Low-Power Single-Ended SAR ADC Using Symmetrical DAC Switching for Image Sensors With Passive CDS and PGA Technique
Author:
Funder
National Natural Science Foundation of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8919/8402068/08268665.pdf?arnumber=8268665
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1. Design Methodology for Compact Single-Channel 3-Stage Capacitor-Array-Assisted Charge-Injection DAC-Based SAR ADC;IEEE Transactions on Circuits and Systems I: Regular Papers;2024
2. A low settling time switching scheme for SAR ADCs with reset‐free regenerative comparator;International Journal of Circuit Theory and Applications;2023-02-26
3. Digitalized analog integrated circuits;Fundamental Research;2023-02
4. An energy efficient symmetrical DAC switching scheme for single-ended SAR ADCs with zero reset energy and a 3-stage common-mode insensitive regenerative comparator;AEU - International Journal of Electronics and Communications;2022-12
5. A 16-bit 300-kS/s foreground calibration SAR ADC with single-ended/differential configurable input modes;Microelectronics Journal;2022-10
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