Design Methodology for Compact Single-Channel 3-Stage Capacitor-Array-Assisted Charge-Injection DAC-Based SAR ADC-Reference-Cited by-同舟云学术

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Design Methodology for Compact Single-Channel 3-Stage Capacitor-Array-Assisted Charge-Injection DAC-Based SAR ADC

Published:2024 Issue: Volume: Page:1-12
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Kye Chan-Ho¹,Byeon Yu-Jin²,Choo Kyojin³,Choo Min-Seong²^ORCID

Affiliation:

1. Institute of Electrical and Micro Engineering, Swiss Federal Institute of Technology Lausanne (EPFL), Neuchâtel, Switzerland

2. School of Electrical Engineering, Hanyang University, Ansan-si, South Korea

3. Electrical and Microengineering, Swiss Federal Institute of Technology Lausanne (EPFL), Neuchâtel, Switzerland

Funder

research grant of the University of Suwon, in 2024

IC Design Education Center (IDEC), South Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/8919/4358591/10586762.pdf?arnumber=10586762

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