A 19-Gb/s Serial Link Receiver With Both 4-Tap FFE and 5-Tap DFE Functions in 45-nm SOI CMOS-Reference-Cited by-同舟云学术

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A 19-Gb/s Serial Link Receiver With Both 4-Tap FFE and 5-Tap DFE Functions in 45-nm SOI CMOS

Published:2012-12 Issue:12 Volume:47 Page:3220-3231
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Agrawal Ankur,Bulzacchelli John F.,Dickson Timothy O.,Liu Yong,Tierno Jose A.,Friedman Daniel J.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/6392234/06327374.pdf?arnumber=6327374

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2. A Sub-Baud-Rate Wireline Receiver With One-Tap DFE;IEEE Journal of Solid-State Circuits;2024

3. A Five-Tap Delay-Line-Based Feed-Forward-Equalizer for 200-Gb/s Wireline Receiver in 28-nm CMOS;IEEE Journal of Solid-State Circuits;2024-01

4. Improving Linearity in CMOS Phase Interpolators;IEEE Journal of Solid-State Circuits;2023-06

5. An Attachable Fractional Divider Transforming an Integer-N PLL Into a Fractional-N PLL Achieving Only 0.35-ps_rms-Integrated-Jitter Degradation With SSC Capability;IEEE Solid-State Circuits Letters;2023

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