A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS-Reference-Cited by-同舟云学术

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A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS

Published:2017-04 Issue:4 Volume:52 Page:940-949
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Satpathy Sudhir^ORCID,Mathew Sanu K.,Suresh Vikram,Anders Mark A.,Kaul Himanshu,Agarwal Amit,Hsu Steven K.,Chen Gregory,Krishnamurthy Ram K.,De Vivek K.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/7888613/07829394.pdf?arnumber=7829394

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