112-Gb/s PAM4 ADC-Based SERDES Receiver With Resonant AFE for Long-Reach Channels
Author:
Funder
Intel Corporation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/9048008/08952650.pdf?arnumber=8952650
Cited by 42 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
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2. A 56 Gb/s 9.6 mW PAM-4 Receiver Analog Front-End Based on gm-Boosted;2023 Asia Communications and Photonics Conference/2023 International Photonics and Optoelectronics Meetings (ACP/POEM);2023-11-04
3. A High Efficiency 14–28 Gb/s Tunable Receiver Analog Front-End in 65 nm CMOS Technology;Journal of Circuits, Systems and Computers;2023-10-28
4. Equalization technology and Quantization analysis for Data-converter Based PAM4 SerDes Link;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20
5. FPGA-Based Configurable and Highly Flexible PAM4 SerDes Simulation System;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-09
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