A 0.8–1.2 V 10–50 MS/s 13-bit Subranging Pipelined-SAR ADC Using a Temperature-Insensitive Time-Based Amplifier-Reference-Cited by-同舟云学术

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A 0.8–1.2 V 10–50 MS/s 13-bit Subranging Pipelined-SAR ADC Using a Temperature-Insensitive Time-Based Amplifier

Published:2017-11 Issue:11 Volume:52 Page:2991-3005
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Zhang Minglei^ORCID,Noh Kyoohyun,Fan Xiaohua,Sanchez-Sinencio Edgar

Funder

Texas Instruments

Silicon Labs

Intel

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/8081776/08027194.pdf?arnumber=8027194

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