10.6 A 10GHz FMCW Modulator Achieving 680MHz/μs Chirp Slope and 150kHz rms Frequency Error Based on a Digital-PLL with a Non-Uniform Piecewise-Parabolic Digital Predistortion
Author:
Affiliation:
1. Politecnico di Milano,Milan,Italy
2. Infineon Technologies,Villach,Austria
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10454133/10454267/10454289.pdf?arnumber=10454289
Reference6 articles.
1. A 23GHz low-phase-noise digital bang-bang PLL for fast triangular and saw-tooth chirp modulation
2. A 9-to-12GHz Coupled-RTWO FMCW ADPLL with 97fs RMS Jitter, -120dBc/Hz PN at 1MHz Offset, and With Retrace Time of 12.5ns and 2μs Chirp Settling Time
3. 32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope
4. A 16GHz, 41kHzrms Frequency Error, Background-Calibrated, Duty-Cycled FMCW Charge-Pump PLL;Renukaswamy;ISSCC,2023
5. A Self-Calibrated 16GHz Subsampling-PLL-Based 30μs Fast Chirp FMCW Modulator with 1.5GHz Bandwidth and 100kHz rms Error;Shi;ISSCC,2019
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