24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit-Reference-Cited by-同舟云学术

24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit

Published:2021-02-13 Issue: Volume: Page:
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Container-title:2021 IEEE International Solid- State Circuits Conference (ISSCC)
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Author:

Song Taejoong,Rim Woojin,Kim Hoonki,Cho Keun Hwi,Kim Taeyeong,Lee TaeJung,Bae Geumjong,Kim Dong-Won,Kwon SD,Baek Sanghoon,Jung Jonghoon,Kye Jongwook,Jung Hakchul,Kim Hyungtae,Jung Soon-Moon,Park Jaehong

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9365732/9365735/09365988.pdf?arnumber=9365988

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