A 5nm 3.4GHz Tri-Gear ARMv9 CPU Subsystem in a Fully Integrated 5G Flagship Mobile SoC

Author:

Nayak Ashish1,Chen HsinChen1,Mair Hugh1,Lagerquist Rolf1,Chen Tao1,Rajagopalan Anand1,Gammie Gordon1,Madhavaram Ramu1,Jagota Madhur1,Chung CJ1,Wiedemeier Jenny1,Meera Bala1,Yeh Chao-Yang2,Lin Maverick2,Lin Curtis2,Lin Vincent2,Lin Jiun2,Chen YS2,Chen Barry2,Wu Cheng-Yuh2,ChangChien Ryan2,Tzeng Ray2,Yang Kelvin2,Thippana Achuta1,Wang Ericbill2,Hwang SA2

Affiliation:

1. MediaTek,Austin,TX

2. MediaTek,Hsinchu,Taiwan

Publisher

IEEE

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. 2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoC;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

2. 30.6 Vecim: A 289.13GOPS/W RISC-V Vector Co-Processor with Compute-in-Memory Vector Register File for Efficient High-Performance Computing;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

3. 2.2 A 5G Mobile Gaming-Centric SoC with High-Performance Thermal Management in 4nm FinFET;2023 IEEE International Solid- State Circuits Conference (ISSCC);2023-02-19

4. Graphene-Based Interconnect Exploration for Large SRAM Caches for Ultrascaled Technology Nodes;IEEE Transactions on Electron Devices;2023-01

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