DIMC: 2219TOPS/W 2569F2/b Digital In-Memory Computing Macro in 28nm Based on Approximate Arithmetic Hardware
Author:
Affiliation:
1. Columbia University,New York,NY
2. Intel,Portland,OR
Funder
NSF
SRC
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731659.pdf?arnumber=9731659
Reference7 articles.
1. Circuit techniques for dynamic variation tolerance
2. C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism
3. Approximate de-randomizer for stochastic circuits
4. An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications;chih;ISSCC,2021
5. A 1-16b Precision Reconfigurable Digital In-Memory Computing Macro Featuring Column-MAC Architecture and Bit-Serial Computation
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