A 1-16b Precision Reconfigurable Digital In-Memory Computing Macro Featuring Column-MAC Architecture and Bit-Serial Computation-Reference-Cited by-同舟云学术

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A 1-16b Precision Reconfigurable Digital In-Memory Computing Macro Featuring Column-MAC Architecture and Bit-Serial Computation

Published:2019-09 Issue: Volume: Page:
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Container-title:ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)
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Author:

Kim Hyunjoon,Chen Qian,Yoo Taegeun,Kim Tony Tae-Hyoung,Kim Bongjin

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8895615/8902346/08902824.pdf?arnumber=8902824

Cited by 41 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Skew-CIM: Process-Variation-Resilient and Energy-Efficient Computation-in-Memory Design Technique With Skewed Weights;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-05

2. Probabilistic Compute-in-Memory Design for Efficient Markov Chain Monte Carlo Sampling;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-02

3. SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros;IEEE Journal of Solid-State Circuits;2024

4. Software frameworks for TinyML;TinyML for Edge Intelligence in IoT and LPWAN Networks;2024

5. An 8T and 10T static random access memory with bit-serial operations for in-memory computing;2023-12-19

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