Skew-CIM: Process-Variation-Resilient and Energy-Efficient Computation-in-Memory Design Technique With Skewed Weights-Reference-Cited by-同舟云学术

Skew-CIM: Process-Variation-Resilient and Energy-Efficient Computation-in-Memory Design Technique With Skewed Weights

Published:2024-05 Issue:5 Volume:71 Page:2067-2078
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Yi Donghyeon¹^ORCID,Lee Seoyoung¹,Choi Injun¹^ORCID,Yun Gichan¹^ORCID,Choi Edward Jongyoon¹,Park Jonghee²,Kwak Jonghoon²,Jang Sung-Joon²^ORCID,Ha Sohmyung³^ORCID,Chang Ik-Joon⁴^ORCID,Je Minkyu¹^ORCID

Affiliation:

1. School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea

2. Korea Electronics Technology Institute (KETI), Seongnam, South Korea

3. Electrical Engineering and Bioengineering Division of Engineering, New York University Abu Dhabi, Abu Dhabi, United Arab Emirates

4. Department of Electronics, Kyung Hee University, Yongin, South Korea

Funder

Institute of Information and Communications Technology Planning and Evaluation

Korean Government [Ministry of Science and ICT (MSIT)]

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/8919/10510354/10473213.pdf?arnumber=10473213

Reference35 articles.

1. CONV-SRAM: An Energy-Efficient SRAM With In-Memory Dot-Product Computation for Low-Power Convolutional Neural Networks

2. NAND-Net: Minimizing Computational Complexity of In-Memory Processing for Binary Neural Networks

3. XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks

4. C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism

5. 24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors

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