Reducing Variation in Advanced Logic Technologies: Approaches to Process and Design for Manufacturability of Nanoscale CMOS-Reference-Cited by-同舟云学术

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Reducing Variation in Advanced Logic Technologies: Approaches to Process and Design for Manufacturability of Nanoscale CMOS

Published:2007 Issue: Volume: Page:
ISSN:
Container-title:2007 IEEE International Electron Devices Meeting
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Author:

Kuhn Kelin J.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4418847/4418848/04418976.pdf?arnumber=4418976

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