14 nm gate length CMOSFETs utilizing low thermal budget process with poly-SiGe and Ni salicide-Reference-Cited by-同舟云学术

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14 nm gate length CMOSFETs utilizing low thermal budget process with poly-SiGe and Ni salicide

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Container-title:Digest. International Electron Devices Meeting,
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Author:

Hokazono A.,Ohuchi K.,Takayanagi M.,Watanabe Y.,Magoshi S.,Kato Y.,Shimizu T.,Mori S.,Oguma H.,Sasaki T.,Yoshimura H.,Miyano K.,Yasutake N.,Suto H.,Adachi K.,Fukui H.,Watanabe T.,Tamaoki N.,Toyoshima Y.,Ishiuchi H.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/8330/25999/01175920.pdf?arnumber=1175920

Cited by 32 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Observation of heterostructure epitaxy of Pt-doped Ni-monosilicide on Si(001);Microelectronic Engineering;2019-01

2. High-κ dielectric and metal gate;CMOS Past, Present and Future;2018

3. Chemically Homogeneous and Thermally Robust Ni1–xPtxSi Film Formed Under a Non-Equilibrium Melting/Quenching Condition;ACS Applied Materials & Interfaces;2016-12-29

4. Investigation on Suppression of Nickel-Silicide Formation By Fluorocarbon Reactive Ion Etch (RIE) and Plasma-Enhanced Deposition;JSTS:Journal of Semiconductor Technology and Science;2013-02-28

5. Highly Reliable and Drivability-Enhanced MOS Transistors with Rounded Nanograting Channels;IEICE Transactions on Electronics;2010

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