Extending the FSMD Framework for Validating Code Motions of Array-Handling Programs

Author:

Banerjee Kunal,Sarkar Dipankar,Mandal Chittaranjan

Funder

TCS Research Fellowship

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. ASMD‒FSMD Technique in Designing Signal Processing Devices on Field Programmable Gate Arrays;Journal of Communications Technology and Electronics;2021-12

2. Towards an Approach for Translation Validation of Thread-level Parallelizing Transformations using Colored Petri Nets;Proceedings of the 16th International Conference on Software Technologies;2021

3. Digital Device Design by ASMD-FSMD Technique;Computer Information Systems and Industrial Management;2021

4. Using ASMD-FSMD Technique for Digital Device Design;Theory and Engineering of Dependable Computer Systems and Networks;2021

5. Counter‐example generation procedure for path‐based equivalence checkers;IET Software;2019-08

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