Time-Multiplexed 1687-Network for Test Cost Reduction

Author:

Ansari Muhammad AdilORCID,Jung JihunORCID,Kim Dooyoung,Park SungjuORCID

Funder

Higher Education Commission, Pakistan

National Research Foundation of Korea

Ministry of Trade, Industry and Energy

Korea Semiconductor Research Consortium support program for the development of the future semiconductor device

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Multi-Objective Evolutionary Approach for Test Network Design;2024 IEEE European Test Symposium (ETS);2024-05-20

2. RC-IJTAG: A Methodology for Designing Remotely-Controlled IEEE 1687 Scan Networks;2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT);2023-10-03

3. Synthesis of IJTAG Networks for Multi-Power Domain Systems on Chips;2023 IEEE European Test Symposium (ETS);2023-05-22

4. Refreshing the JTAG Family;2023 IEEE 41st VLSI Test Symposium (VTS);2023-04-24

5. Power-aware test scheduling framework for IEEE 1687 multi-power domain networks using formal techniques;Microelectronics Reliability;2022-07

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