HCI reliability control in HV-PMOS transistors: Conventional EDMOS vs. Dielectric RESURF and lateral field plates-Reference-Cited by-同舟云学术

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HCI reliability control in HV-PMOS transistors: Conventional EDMOS vs. Dielectric RESURF and lateral field plates

Published:2009-06 Issue: Volume: Page:
ISSN:1943-653X
Container-title:2009 21st International Symposium on Power Semiconductor Devices & IC's
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Author:

Perez-Gonzalez J.,Sonsky J.,Heringa A.,Benson J.,Chiang P.Y.,Yao C.W.,Sua R.Y.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5116067/5157975/05158001.pdf?arnumber=5158001

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Review of technologies for high-voltage integrated circuits;Tsinghua Science and Technology;2022-06

2. Improving breakdown voltage for 120 V level up shifter by using vertical and lateral assisted depletion layers in 0.35 μm CMOS technology;Japanese Journal of Applied Physics;2020-02-28

3. On the Effects of High-K Dielectric RESURF in High-Voltage Bulk FinFETs;IEEE Journal of the Electron Devices Society;2020

4. A review of HVI technology;Microelectronics Reliability;2014-12

5. Influence of a Deep NBL Structure on ESD/Latch-Up Immunities in the Power Device nLDMOS;Advanced Materials Research;2013-08

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