Merits of Time-Domain Computing for VMM – A Quantitative Comparison
Author:
Affiliation:
1. Rwth Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany
Funder
Ministry of Education
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10528356/10528364/10528682.pdf?arnumber=10528682
Reference27 articles.
1. 16.4 An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications
2. DIMC: 2219TOPS/W 2569F2/b Digital In-Memory Computing Macro in 28nm Based on Approximate Arithmetic Hardware
3. MC2-RAM: An In-8T-SRAM Computing Macro Featuring Multi-Bit Charge-Domain Computing and ADC-Reduction Weight Encoding
4. AND8T SRAM Macro with Improved Linearity for Multi-Bit In-Memory Computing
5. A 7-nm Compute-in-Memory SRAM Macro Supporting Multi-Bit Input, Weight and Output and Achieving 351 TOPS/W and 372.4 GOPS
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