Aggressive Design Reuse for Ubiquitous Zero-Trust Edge Security—From Physical Design to Machine-Learning-Based Hardware Patching
Author:
Affiliation:
1. ECE Department, National University of Singapore, Queenstown, Singapore
Funder
Singapore National Research Foundation and the Cyber Security Agency through the “SOCure” Project
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/8782712/10019316/09955388.pdf?arnumber=9955388
Reference117 articles.
1. A PVT-Tolerant Oscillation-Collapse-Based True Random Number Generator With an Odd Number of Inverter Stages
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3. A Feedback Architecture of High Speed True Random Number Generator based on Ring Oscillator
4. A New Energy-Efficient and High Throughput Two-Phase Multi-Bit per Cycle Ring Oscillator-Based True Random Number Generator
5. Fully Synthesizable Unified True Random Number Generator and Cryptographic Core
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1. Highly Stable PUFs Based on Stacked Voltage Divider for Near-Zero BER Native Sensitivity to Voltage Variations;IEEE Transactions on Circuits and Systems I: Regular Papers;2024
2. A 0.116 pJ/bit Latch-Based True Random Number Generator Featuring Static Inverter Selection and Noise Enhancement;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023
3. A Single-Inverter-Based True Random Number Generator with on-chip Clock-Tuning-Based Entropy Calibration Circuit;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2023
4. Opening of the 2023 Editorial Year—This Coda as Prelude of Next TVLSI Cycle With Sustained Growth;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-01
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