Author:
Wieckowski Michael,Young Min Park ,Tokunaga Carlos,Dong Woon Kim ,Zhiyoong Foo ,Sylvester Dennis,Blaauw David
Cited by
20 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Avoiding Dynamic Time Error by Implementing Prediction Logic;2023 2nd International Conference on Vision Towards Emerging Trends in Communication and Networking Technologies (ViTECoN);2023-05-05
2. High-Performance ADC Design Using Fast Prediction Logic with Dynamic Clock Stretching Mechanism;2023 International Conference on Sustainable Computing and Data Communication Systems (ICSCDS);2023-03-23
3. A 19-bit Range and 4.5-ps Resolution Fully-Synthesizable Time-to-Digital Converter with Quad-Edge Offset Cancellation;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28
4. Cross-Layer Reliability, Energy Efficiency, and Performance Optimization of Near-Threshold Data Paths;Journal of Low Power Electronics and Applications;2020-12-03
5. A Dynamic Timing Error Avoidance Technique Using Prediction Logic in High-Performance Designs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2019-03