A Two-step Linear-Exponential Incremental ADC with Slope Extended Counting
Author:
Affiliation:
1. Shanghai Jiao Tong University,Department of Micro-Nano Electronics,Shanghai,China
2. Shanghai Aerospace Control Technology Institute,Shanghai,China
3. York University,Toronto,Canada
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10181241/10181318/10182190.pdf?arnumber=10182190
Reference33 articles.
1. A Hybrid Continuous-Time Incremental and SAR Two-Step ADC With 90.5-dB DR Over 1-MHz BW
2. A Hybrid Continuous Time Incremental and SAR Two-Step ADC with 90. 5dB DR over 1MHz BW;wang;IEEE Asian Solid-State Circuits Conference (A-SSCC),2021
3. A Micro-Power Two-Step Incremental Analog-to-Digital Converter
4. A high resolution multi-bit incremental converter insensitive to DAC mismatch error
5. A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation
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