Design and fabrication of a reliability test chip for 3D-TSV-Reference-Cited by-同舟云学术

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Design and fabrication of a reliability test chip for 3D-TSV

Published:2010-06 Issue: Volume: Page:
ISSN:
Container-title:2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)
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Author:

Trigg A D,Yu Li Hong,Zhang Xiaowu,Chong Chai Tai,Kuo Cheng Cheng,Khan Navas,Daquan Yu

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5482824/5490635/05490889.pdf?arnumber=5490889

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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5. Overview and Outlook of Three-Dimensional Integrated Circuit Packaging, Three-Dimensional Si Integration, and Three-Dimensional Integrated Circuit Integration;Journal of Electronic Packaging;2014-10-15

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