Author:
Dilillo L.,Rosinger P.,Al-Hashimi B.M.,Girard P.
Cited by
3 articles.
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1. Low power test architecture for dynamic read destructive fault detection in SRAM;International Journal of Electronics;2018-01-15
2. RES eliminated fault detection;International Journal of Electronics Letters;2017-02-10
3. Low-Power Test Pattern Generation;Power-Aware Testing and Test Strategies for Low Power Devices;2009-08-13