Fully bipolar, 120-Msample/s 10-b track-and-hold circuit

Author:

Vorenkamp P.,Verdaasdonk J.P.M.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 68 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 1.5 V 2 GS/s 82.1 dB-SFDR Track and Hold Circuit Based on the Time-Divided Post-Distortion Cancelation Technique;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-12

2. Time-Interleaved Switched Emitter Followers to Extend Front-End Sampling Rates to up to 200 GS/s;IEEE Journal of Solid-State Circuits;2022-09

3. Track and Hold Amplifier Investigation for 100-GHz Bandwidth, 200-GS/s ADC Front Ends;IEEE Solid-State Circuits Letters;2022

4. Sample-and-Hold Circuits;Analog-to-Digital Conversion;2021-10-22

5. Analysis and Design of a Charge Sampler With 70-GHz 1-dB Bandwidth in 130-nm SiGe BiCMOS;IEEE Transactions on Circuits and Systems I: Regular Papers;2021-09

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