A Physical Explanation of Threshold Voltage Drift of SiC MOSFET Induced by Gate Switching
Author:
Affiliation:
1. School of Electrical Engineering, Chongqing University, Chongqing, China
Funder
Chongqing Technology Innovation and Application Development Special Key
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/63/9770296/09740407.pdf?arnumber=9740407
Reference19 articles.
1. Dynamic Gate Stress Induced Threshold Voltage Drift of Silicon Carbide MOSFET
2. Influence of high-voltage gate-oxide pulses on the BTI behavior of SiC MOSFETs;maaß;Proc IEEE Int Rel Phys Symp,2020
3. Physical Modeling of Charge Trapping in 4H-SiC DMOSFET Technologies
4. Bias Temperature Instability of Silicon Carbide Power MOSFET under AC Gate Stresses
5. Threshold Voltage Instability in 4H-SiC MOSFETs With Phosphorus-Doped and Nitrided Gate Oxides
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4. Study of the Influence of Different Gate Oxide Traps on Threshold Voltage Drift of SiC MOSFET Based on Transient Current;IEEE Transactions on Power Electronics;2024-08
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