Design and Performance of High Voltage Chip-Level Series-Connected SiC MOSFET Module-Reference-Cited by-同舟云学术

Design and Performance of High Voltage Chip-Level Series-Connected SiC MOSFET Module

Published:2023-02 Issue:2 Volume:38 Page:1757-1767
ISSN:0885-8993
Container-title:IEEE Transactions on Power Electronics
language:
Short-container-title:IEEE Trans. Power Electron.

Author:

Shang Hai¹,Liang Lin¹^ORCID,Wang Yijian¹

Affiliation:

1. State Key Laboratory of Advanced Electromagnetic Engineering and Technology, and Power Electronics and Energy Management Key Laboratory, Ministry of Education of China, School of Electrical and Electronic Engineering, Huazhong University of Science and Technology, Wuhan, China

Funder

National Key R&D Program of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/63/9952160/09903346.pdf?arnumber=9903346

Reference29 articles.

1. Series Connection of Insulated Gate Bipolar Transistors (IGBTs)

2. A Single Voltage-Balancing Gate Driver Combined With Limiting Snubber Circuits for Series-Connected SiC MOSFETs

3. Optimisation and integration of an active clamping circuit for IGBT series association