Comparison of via/line package level vs. wafer level results-Reference-Cited by-同舟云学术

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Comparison of via/line package level vs. wafer level results

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Container-title:2001 IEEE International Reliability Physics Symposium Proceedings. 39th Annual (Cat. No.00CH37167)
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Author:

Tibel D.,Sullivan T.D.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/7356/19955/00922901.pdf?arnumber=922901

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Effectiveness of wafer level test for electromigration wear out reporting in advanced CMOS interconnects reliability assessment;Microelectronic Engineering;2013-06

2. Failure Criterion Setting for the Wafer Level Isothermal Electromigration Test;IEEE Transactions on Semiconductor Manufacturing;2011-02

3. Practical considerations for Wafer-Level Electromigration Monitoring in high volume production;2006 IEEE International Integrated Reliability Workshop Final Report;2006-10

4. In-situ Formation of a Copper Silicide Cap For TDDB and Electromigration Improvement;2006 IEEE International Reliability Physics Symposium Proceedings;2006

5. Some practical considerations for effective and efficient wafer-level reliability control;Microelectronics Reliability;2004-08

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