1. A 27-1, 20-Gb/s, 0.1-pJ/b Pseudo Random Bit Sequence Generator Using Incomplete Settling in 1.2V, 65 nm CMOS;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. A 15-Gb/s, 0.036 pJ/bit, Half-Rate, Low Power PRBS Generator in 1.2 V, 65 nm CMOS;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
3. A Compact Low-Power 29 Gb/s Pseudo Random Quaternary Sequence Generator in 65 nm CMOS;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06
4. A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks;Circuits, Systems, and Signal Processing;2023-06-19
5. A 2$$^7$$-1, 20-Gb/s, Low-Power, Charge-Steering Half-Rate PRBS Generator in 1.2 V, 65 nm CMOS;Circuits, Systems, and Signal Processing;2021-05-12