A 2$$^7$$-1, 20-Gb/s, Low-Power, Charge-Steering Half-Rate PRBS Generator in 1.2 V, 65 nm CMOS

Author:

Govindaswamy Prema Kumar,Pasupureddi Vijaya Sankara RaoORCID

Publisher

Springer Science and Business Media LLC

Subject

Applied Mathematics,Signal Processing

Reference21 articles.

1. R. Chandrasekaran, Y. Lian, R.S. Rana, A high-speed low-power D flip-flop, in 6th International Conference on ASIC, vol. 1, pp. 82–85 (2005)

2. T. Dickson et al., A 72 Gb/s $$2^{31}$$-1 PRBS generator in SiGe BiCMOS technology, in IEEE International Digest of Technical Papers. Solid-State Circuits Conference 1, 342–602 (2005)

3. A. Gharib, A. Talai, R. Weigel, D. Kissinger, A 1.16 pJ/bit 80 Gb/s $$2^{11}$$-1 PRBS generator in SiGe bipolar technology, in 9th European Microwave Integrated Circuit Conference, pp. 277–280 (2014)

4. S.W. Golomb, Shift-register sequences and spread-spectrum communications, in Proceedings of IEEE 3rd International Symposium on Spread Spectrum Techniques and Applications (ISSSTA’94), vol. 1, pp. 14–15

5. J. Hu, Z. Zhang, Q. Pan, A 15-Gb/s 0.0037-$$\text{mm}^2$$ 0.019-pJ/bit full-rate programmable multi-pattern pseudo-random binary sequence generator. IEEE Trans. Circuits Syst. II Exp. Briefs 67(9), 1499–1503 (2020)

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks;Circuits, Systems, and Signal Processing;2023-06-19

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