Author:
Mitra Subhasish,Sanda Pia,Seifert Norbert
Cited by
11 articles.
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1. Design of Low Power and Area-Efficient Memory Cell;2022 8th International Conference on Signal Processing and Communication (ICSC);2022-12-01
2. DAD-FF: Hardening Designs by Delay-Adjustable D-Flip-Flop for Soft-Error-Rate Reduction;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2020-04
3. Single bit‐line 11T SRAM cell for low power and improved stability;IET Computers & Digital Techniques;2020-03-31
4. The likelihood of multiple bit-flips due to neutron strikes and its implications on circuit designs;2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA);2019-07
5. 3-D TCAD Assessment of Fin-Based Hybrid Devices Under Heavy Ion Irradiation in 20-nm Technology;IEEE Transactions on Device and Materials Reliability;2018-09