Modeling and optimization of BiCMOS embedded through-silicon vias for RF-grounding-Reference-Cited by-同舟云学术

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Modeling and optimization of BiCMOS embedded through-silicon vias for RF-grounding

Published:2014-01 Issue: Volume: Page:
ISSN:
Container-title:2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in Rf Systems
language:
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Author:

Wietstruck M.¹,Kaynak M.¹,Marschmeyer S.¹,Wipf C.¹,Tekin I.²,Zoschke K.³,Tillack B.¹

Affiliation:

1. IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany

2. Sabanci University, Electronics Engineering, 34956 Tuzla, Istanbul, Turkey

3. Fraunhofer IZM, Gustav-Meyer-Allee 25, 13355 Berlin, Germany

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6821319/6828499/06828523.pdf?arnumber=6828523

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Silicon-Based IC-Waveguide Integration for Compact and High-Efficiency mm-Wave Spatial Power Combiners;IEEE Transactions on Components, Packaging and Manufacturing Technology;2021-07

2. Spectroscopic reflectometry for characterization of Through Silicon Via profile of Bosch etching process;Journal of Vacuum Science & Technology B;2019-11

3. (Invited) SiGe BiCMOS Heterogeneous Integration Using Wafer Bonding Technologies;ECS Transactions;2017-08-01

4. Very high aspect ratio through silicon via reflectometry;Optical Measurement Systems for Industrial Inspection X;2017-06-26

5. Accurate Depth Control of Through-Silicon Vias by Substrate Integrated Etch Stop Layers;2017 IEEE 67th Electronic Components and Technology Conference (ECTC);2017-05

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