A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects

Author:

Qi Nan,Kang Yuhang,Lin Qipeng,Ma Jianxu,Shi Jingbo,Yin Bozhi,Liu Chang,Bai Rui,Hu Shang,Wang Juncheng,Du Jiangbing,Ma Lin,He Zuyuan,Liu Ming,Zhang Feng,Chiang Patrick Yin

Publisher

IEEE

Cited by 20 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Low-Jitter Phase Detection Technique With Asymmetric Weights in Multi-Level Baud-Rate CDR;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

2. A 14–28 Gb/s Reference-less Baud-rate CDR with Integrator-based Stochastic Phase and Frequency Detector;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

3. A 48 Gb/s PAM-4 Receiver With Pre-Cursor Adjustable Baud-Rate Phase Detector in 40 nm CMOS;IEEE Journal of Solid-State Circuits;2023-05

4. A Novel High-Gain PAM4 Baud-Rate Phase Detector for ADC-Based CDR;2022 7th International Conference on Integrated Circuits and Microsystems (ICICM);2022-10-28

5. A 56-Gb/s PAM-4 Transmitter/Receiver Chipset With Nonlinear FFE for VCSEL-Based Optical Links in 40-nm CMOS;IEEE Journal of Solid-State Circuits;2022-10

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