A 56-Gb/s PAM-4 Transmitter/Receiver Chipset With Nonlinear FFE for VCSEL-Based Optical Links in 40-nm CMOS
Author:
Affiliation:
1. Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan
2. M31 Technology Corporation, Hsinchu, Taiwan
3. Taiwan Semiconductor Research Institute (TSRI), National Applied Research Laboratories (NARL), Hsinchu, Taiwan
Funder
Ministry of Science and Technology (MOST) in Taiwan
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/9900477/09844143.pdf?arnumber=9844143
Reference26 articles.
1. A 4-channel 200 Gb/s PAM-4 BiCMOS transceiver with silicon photonics front-ends for gigabit Ethernet applications;sentieri;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2020
2. A 50 Gb/s 190 mW Asymmetric 3-Tap FFE VCSEL Driver
3. A 64 Gb/s 2.09 pJ/b PAM-4 VCSEL Transmitter with Bandwidth Extension Techniques in 40 nm CMOS
4. A 64 Gb/s 2.29 pJ/b PAM-4 VCSEL transmitter with 3-tap asymmetric FFE in 65 nm CMOS;hwang;Proc IEEE Symp VLSI Circuits,2019
5. A Scalable 32-56 Gb/s 0.56-1.28 pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28-nm CMOS
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