A hybrid SAR-VCO ΔΣ ADC with first-order noise shaping
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/6924030/6945974/06946082.pdf?arnumber=6946082
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A Digital Background Calibration Circuit for Coarse-Fine Timing Mismatch in VCO-Based ADCs;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-08
2. An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction;Circuits, Systems, and Signal Processing;2023-10-24
3. A short review of some analog-to-digital converters resolution enhancement methods;Measurement;2021-08
4. A Hybrid Architecture for a Reconfigurable SAR ADC;Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V & Advanced Node Analog Circuit Design;2017-09-19
5. Two-step pulse-shrinking time-to-digital converter;Microelectronics Journal;2017-02
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