Parametric Extraction and Comparison of Different Voltage-Mode based Sense Amplifier Topologies
Author:
Affiliation:
1. Delhi Technological University,Dept. of ECE,Delhi,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9725360/9725386/09725671.pdf?arnumber=9725671
Reference14 articles.
1. A 7-ns 140-mW 1-Mb CMOS SRAM with current sense amplifier
2. Design of faster & power efficient sense amplifier using VLSI technology
3. A new current-mode sense amplifier for low-voltage low-power SRAM
4. A novel high-speed sense amplifier for Bi-NOR flash memories;chiu-chiao;IEEE J Solid-State Circuit,2005
5. A Review of sense amplifiers for static random- access memory;zhu;IETE Technical Review,2013
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1. Comparative Analysis of Current Sense Amplifier Architectures for SRAM at 45 nm Technology Node;Advances in Data-Driven Computing and Intelligent Systems;2023
2. Impact of High-Performance Transistor on Performance of Static Random Access Memory for Low-Voltage Applications;Proceedings of Second International Conference on Computational Electronics for Wireless Communications;2023
3. An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset;Microelectronics Journal;2022-10
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