Author:
Dutta Kuheli,Chattopadhyay Sudipta,Biswas Vaishna,Ghatak Suman Roy
Cited by
4 articles.
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1. Study of Adiabatic Logic-Based Combinational and Sequential Circuits for Low-Power Applications;Low Power Architectures for IoT Applications;2023
2. Design of Low Power Vedic Multiplier Using Adiabatic Techniques;Cognitive Informatics and Soft Computing;2022
3. VLSI Implementation of Vedic Multiplier;Design and Development of Efficient Energy Systems;2021-04-15
4. Area efficient multiplier using NANO CMOS logic style;PROCEEDINGS OF THE 4TH NATIONAL CONFERENCE ON CURRENT AND EMERGING PROCESS TECHNOLOGIES E-CONCEPT-2021;2021