Functional coverage-driven UVM-based UART IP verification
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7506193/7516874/07517188.pdf?arnumber=7517188
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Optimal Test Scenarios based Regression Suite for Functional Verification Closure of Advanced Digital Designs;2024 International Conference on Smart Systems for applications in Electrical Sciences (ICSSES);2024-05-03
2. RTL to GDS Implementation and Verification of UART using UVM and OpenROAD;2024 IEEE 14th Annual Computing and Communication Workshop and Conference (CCWC);2024-01-08
3. A Speed Up Method towards DDR Subsystem Functional Verification in SoC;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24
4. Design and Implementation of a Sustainable FPGA-Based UART with HyperTerminal and External Input Device Integration for Enhanced Communication;Communications in Computer and Information Science;2023
5. Optimal Test Sequences for Logic Verification closure in State Dependent RTL Digital designs;2022 13th International Conference on Computing Communication and Networking Technologies (ICCCNT);2022-10-03
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