A 1.6pJ/b 65Gb/s Si-Dielectric-Waveguide based Multi-Mode Multi-Drop sub-THz Interconnect in 65nm CMOS
Author:
Affiliation:
1. University of California Davis,Davis,CA,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10121189/10121178/10121251.pdf?arnumber=10121251
Reference6 articles.
1. 11.9 A 105Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler
2. Analysis and Design of a Foam-Cladded PMF Link With Phase Tuning in 28-nm CMOS
3. Multiplexing Schemes for sub-THz/THz Interconnects (Invited)
4. A 50Gb/s PAM-4 Bi-Directional Plastic Waveguide Link with Carrier Synchronization Using PI-Based Costas Loop
5. Monolithic Microring-based WDM Optical I/O for Heterogeneous Computing
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1. A G-Band ASK Transceiver for Short-Range Communications in 130 nm SiGe BiCMOS;2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME);2024-06-09
2. Design and Analysis of a Mode-Coupler-Based Multimode Multidrop Si Dielectric Waveguide Channel for Sub-THz/THz Interconnect;IEEE Transactions on Microwave Theory and Techniques;2024-01
3. A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET;IEEE Journal of Solid-State Circuits;2023-12
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