Temperature Analysis of a Dopingless TFET Considering Interface Trap Charges for Enhanced Reliability
Author:
Affiliation:
1. Department of Electronics and Communication Engineering, National Institute of Technology Delhi, New Delhi, India
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/9761777/09737629.pdf?arnumber=9737629
Reference32 articles.
1. Impact of Body Doping and Thickness on the Performance of Germanium-Source TFETs
2. Linearity and low-noise performance of SOI MOSFETs for RF applications
3. An Improved Analog/RF and Linearity Performances with Small-Signal Parameter Extraction of Virtually Doped Recessed Source/Drain Dopingless Junctionless Transistor for Radio-Frequency Applications
4. Current Status of Reliability in Extended and Beyond CMOS Devices
5. Temperature dependence of the energy gap in semiconductors
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