A Verilog to C compiler-Reference-Cited by-同舟云学术

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A Verilog to C compiler

Published: Issue: Volume: Page:
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Container-title:Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668)
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Author:

Greaves D.J.

Publisher

IEEE Comput. Soc

Link

http://xplorestaging.ieee.org/ielx5/6906/18573/00855208.pdf?arnumber=855208

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Verifying RISC-V Privilege Transition Integrity Through Symbolic Execution;2023 IEEE 32nd Asian Test Symposium (ATS);2023-10-14

2. Bridging Hardware and Software Analysis with Btor2C: A Word-Level-Circuit-to-C Translator;Tools and Algorithms for the Construction and Analysis of Systems;2023

3. An SMT-Based Reverse Engineering of Register Allocation in High-Level Synthesis;Lecture Notes in Electrical Engineering;2023

4. Reverse Engineering Register to Variable Mapping in High-level Synthesis;2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI);2021-07

5. Effective simulation and debugging for a high-level hardware language using software compilers;Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems;2021-04-17

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