Evaluation of 3D interconnect routing and stacking strategy to optimize high speed signal transmission for memory on logic-Reference-Cited by-同舟云学术

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Evaluation of 3D interconnect routing and stacking strategy to optimize high speed signal transmission for memory on logic

Published:2012-05 Issue: Volume: Page:
ISSN:
Container-title:2012 IEEE 62nd Electronic Components and Technology Conference
language:
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Author:

Roullard J.,Farcy A.,Capraro S.,Lacrevaz T.,Bermond C.,Houzet G.,Charbonnier J.,Fuchs C.,Ferrandon C.,Leduc P.,Flechet B.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6241679/6248788/06248798.pdf?arnumber=6248798

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