Electrical Performance of High Density 10 µm Diameter 20 µm Pitch Cu-Pillar with Chip to Wafer Assembly

Author:

Garnier A.,Arnaud L.,Franiatte R.,Toffoli A.,Moreau S.,Bana F.,Cheramy S.

Publisher

IEEE

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. RF Performances and De-Embedding Techniques of Passive Devices in 3D Homogeneous Integration at Sub-THz;2023 53rd European Microwave Conference (EuMC);2023-09-19

2. Benchmarking Frequency-Dependent Parasitics of Fine-Pitch Off-Chip I/Os for 2.5D and 3D Heterogeneous Integration;IEEE Transactions on Components, Packaging and Manufacturing Technology;2022-12

3. Electrical and Morphological Characterizations of 3D Interconnections for Quantum Computation;IEEE Transactions on Components, Packaging and Manufacturing Technology;2021

4. Die-to-Wafer 3D Interconnections Operating at Sub-Kelvin Temperatures for Quantum Computation;2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC);2020-09-15

5. Ball Lens Embedded Through-Package Via To Enable Backside Coupling Between Silicon Photonics Interposer and Board-Level Interconnects;Journal of Lightwave Technology;2020-04-15

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