TSV residual Cu step height analysis by white light interferometry for 3D integration
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7133058/7159553/07159649.pdf?arnumber=7159649
Cited by 18 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. TSV Integration With Chip Level TSV-to-Pad Cu/SiO₂ Hybrid Bonding for DRAM Multiple Layer Stacking;IEEE Electron Device Letters;2023-07
2. Height measurement of microbumps using a white-light triangulation method;Applied Optics;2022-03-07
3. The Effect of Pitch Distance on the Statistics and Morphology of Through-Silicon Via Extrusion;IEEE Transactions on Components, Packaging and Manufacturing Technology;2021-06
4. Study on the relationship between Cu protrusion behavior and stresses evolution in the through-silicon via characterized by in-situ μ-Raman spectroscopy;Microelectronics Reliability;2020-12
5. Microstructure and Mechanical Reliability Issues of TSV;3D Microelectronic Packaging;2020-11-24
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