Characterization and management of wafer stress for various pattern densities in 3D integration technology-Reference-Cited by-同舟云学术

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Characterization and management of wafer stress for various pattern densities in 3D integration technology

Published:2010-06 Issue: Volume: Page:
ISSN:
Container-title:2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)
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Author:

Pang X. F.,Chua T. T.,Li H. Y.,Liao E. B.,Lee W. S.,Che F. X.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5482824/5490635/05490707.pdf?arnumber=5490707

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Towards Zero-Defect Manufacturing in the Silicon Wafer Production Through Calibration Measurement Process: An Italian Case;IFIP Advances in Information and Communication Technology;2024

2. Impact of thermal oxidation uniformity on 150 mm GaAs- and Ge-substrate VCSELs;Journal of Physics D: Applied Physics;2023-03-13

3. Pre-fabricated High-density TSV Interposer for Programmable IC Applications;2022 17th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT);2022-10-26

4. Warpage Prediction of Wafer-Level Interposer Packaging Using Equivalent Model;2022 23rd International Conference on Electronic Packaging Technology (ICEPT);2022-08-10

5. Heterogeneous Integration of Chip-to-Chip Stacks;Heterogeneous Integrations;2019

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