Author:
Mintarno E.,Chandra V.,Pietromonaco D.,Aitken R.,Dutton R. W.
Cited by
18 articles.
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1. An Efficient Aged Timing Analysis Method for Digital Integrated Circuit Under NBTI Effect;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
2. Logical Resolving-Based Methodology for Efficient Reliability Analysis;Micromachines;2023-12-30
3. ML to the Rescue;Proceedings of the 28th Asia and South Pacific Design Automation Conference;2023-01-16
4. Measurement Results of Real Circuit Delay Degradation under Realistic Workload;IPSJ Transactions on System and LSI Design Methodology;2023
5. Efficient Analysis for Mitigation of Workload-Dependent Aging Degradation;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-12