A 1.296-to-5.184Gb/s Transceiver with 2.4mW/(Gb/s) Burst-mode CDR using Dual-Edge Injection-Locked Oscillator-Reference-Cited by-同舟云学术

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A 1.296-to-5.184Gb/s Transceiver with 2.4mW/(Gb/s) Burst-mode CDR using Dual-Edge Injection-Locked Oscillator

Published:2010-02 Issue: Volume: Page:
ISSN:
Container-title:2010 IEEE International Solid-State Circuits Conference - (ISSCC)
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Author:

Maruko K.,Sugioka T.,Hayashi H.,Zhiwei Zhou ,Tsukuda Y.,Yagishita Y.,Konishi H.,Ogata T.,Owa H.,Niki T.,Konda K.,Sato M.,Shiroshita H.,Ogura T.,Aoki T.,Kihara H.,Tanaka S.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5428240/5433812/05433821.pdf?arnumber=5433821

Cited by 25 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Low Power Injection-Locked CDR Using 28 nm FDSOI Technology for Burst-Mode Applications;Journal of Low Power Electronics and Applications;2024-04-07

2. A 50 Gb/s Low-Voltage Burst-Mode CDR based on Dual-Edge Injection-Locked Oscillator;2023 IEEE 11th Asia-Pacific Conference on Antennas and Propagation (APCAP);2023-11-22

3. Phase Interpolator-Based Clock and Data Recovery With Jitter Optimization;IEEE Open Journal of Circuits and Systems;2023

4. 4-Cycle-Start-Up Reference-Clock-Less Digital CDR Utilizing TDC-Based Initial Frequency Error Detection with Frequency Tracking Loop;IEICE Transactions on Electronics;2022-10-01

5. A low power injection-locked CDR using 28 nm FDSOI technology for burst-mode applications;2022-09-27

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