A 32Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28nm CMOS-Reference-Cited by-同舟云学术

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A 32Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28nm CMOS

Published:2013-02 Issue: Volume: Page:
ISSN:
Container-title:2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers
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Author:

Parikh S.,Kao T.,Hidaka Y.,Jian Jiang ,Toda A.,Mcleod S.,Walker W.,Koyanagi Y.,Shibuya T.,Yamada J.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6480926/6487590/06487622.pdf?arnumber=6487622

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4. A 32Gb/s Equalizer with Adaptive T-Coil Input Matching and Fullrate DFE in 28nm CMOS;2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA);2024-04-22

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