22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration-Reference-Cited by-同舟云学术

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22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration

Published:2014-02 Issue: Volume: Page:
ISSN:
Container-title:2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)
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Author:

Lee Sunghyuk,Chandrakasan Anantha P.,Lee Hae-Seung

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6747109/6757318/06757480.pdf?arnumber=6757480

Cited by 31 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A fully digital timing background calibration algorithm based on first-order auto-correlation for time-interleaved ADCs;Microelectronics Journal;2024-10

2. A Simple Timing-skew Calibration using Flip-flops for Time-interleaved ADCs;JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE;2023-04-30

3. 6GS/s 8-channel CIC SAR TI-ADC with Neural Network Calibration;ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC);2022-09-19

4. Background Timing Mismatch Calibration Techniques in High-Speed Time-Interleaved ADCs: A Tutorial Review;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-06

5. A Single-Channel 1-GS/s 7.48-ENOB Parallel Conversion Pipelined SAR ADC With a Varactor-Based Residue Amplifier;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-04

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