3.4 A 40/50/100Gb/s PAM-4 Ethernet transceiver in 28nm CMOS-Reference-Cited by-同舟云学术

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3.4 A 40/50/100Gb/s PAM-4 Ethernet transceiver in 28nm CMOS

Published:2016-01 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE International Solid-State Circuits Conference (ISSCC)
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Author:

Gopalakrishnan Karthik,Ren Alan,Tan Amber,Farhood Arash,Tiruvur Arun,Helal Belal,Loi Chang-Feng,Jiang Chris,Cirit Halil,Quek Irene,Riani Jamal,Gorecki James,Wu Jennifer,Pernillo Jorge,Tse Lawrence,Le Michael,Ranjbar Mohammad,Wong Pui-Shan,Khandelwal Pulkit,Narayanan Rajesh,Mohanavelu Ravindran,Herlekar Sameer,Bhoja Sudeep,Shvydun Vlad

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7405163/7417881/7417907.pdf?arnumber=7417907

Cited by 36 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 50-Gb/s PAM-4 Receiver With Adaptive Phase-Shifting CDR in 28-nm CMOS;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-08

2. A 28/56 Gb/s NRZ/PAM-4 dual-mode transceiver with 1/4 rate reconfigurable 4-tap FFE and half-rate slicer in a 28-nm CMOS;Journal of Semiconductors;2024-06-01

3. A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR;IEEE Journal of Solid-State Circuits;2024-02

4. Advancing Baud Rate Receivers: On Multiple CTLE Parameters Background Adaptation;IEEE Access;2024

5. A low jitter 50 Gb/s PAM4 optical receiver in 130 nm SiGe BiCMOS;Microelectronics Journal;2023-06

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