Poly-Si Nanowire Nonvolatile Memory With Nanocrystal Indium–Gallium–Zinc–Oxide Charge-Trapping Layer-Reference-Cited by-同舟云学术

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Poly-Si Nanowire Nonvolatile Memory With Nanocrystal Indium–Gallium–Zinc–Oxide Charge-Trapping Layer

Published:2010-12 Issue:12 Volume:31 Page:1407-1409
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Chen Lun-Chun,Wu Yung-Chun,Lin Tien-Chun,Huang Jyun-Yang,Hung Min-Feng,Chen Jiang-Hung,Chang Chun-Yen

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/55/5635414/05606189.pdf?arnumber=5606189

Cited by 14 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Comparative investigation of anisotropic etches for polysilicon nanowire definition in thin film technology;Engineering Research Express;2023-03-01

2. Width dependence of drain current and carrier mobility in gate-all-around multi-channel polycrystalline silicon nanowire transistors with 10 nm width scale;Japanese Journal of Applied Physics;2020-02-01

3. Preparation of Mono-Layered Ag Nanoparticles for Charge-Trap Sites of Memory Thin-Film Transistors Using In-Ga-Zn-O Channel;ECS Journal of Solid State Science and Technology;2016-12-22

4. Process Optimization and Device Characterization of Nonvolatile Charge Trap Memory Transistors Using In–Ga–ZnO Thin Films as Both Charge Trap and Active Channel Layers;IEEE Transactions on Electron Devices;2016-08

5. P-18: High Reliability Amorphous-Oxide Thin-Film Transistors with an Expanded-Electrode Structure;SID Symposium Digest of Technical Papers;2016-05

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